Model S USB, on a more specific level (2)

So, going further into the Model S USB details…

On the clocking side, it is the asynchronous USB device, which means that it operates as a master device that controls the data flow from the host PC. There are two quality discrete crystal oscillators inside the DAC, switched as required by a native sampling frequency of the program in question. One 11.2896 MHz clock is used for 44.1/88.2/176.4 kHz, and another one, 12.288 MHz, is used for 48/96/192 kHz programs. So, no PLL here to lock to the incoming stream, or to the one basic frequency.

This USB front end effectively has two portions. One is right at the USB input, at the “PC side”, which comprises the chip that communicates to the PC, and decodes the USB (NRZI) signal. The decoded basic PCM signal is then transferred to the other portion, located at the “DAC side”, and which is isolated from the first one. Master clocks are located on this other side, where they control (reclock) the PCM stream. As a result, the decoded PCM signal that comes from the USB chip is both managed directly by the master oscillators at the DAC side, thus removing all the jitter issues associated with the PC and USB interface and hardware, and it is fully isolated with respect to PC, thus removing noise and ground related PC issues.

Such a clean PCM signal then feeds venerable TDA1541A.

(to be continued)

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