Another story about TDA1541A: 384 kHz

Everyone trying to find some information on Philips old D/A chips in their documentation is faced from time to time with different, and even puzzling data. Probably it is because different authors were adding different data over time. Inconsistencies however sometimes occur even inside one single paper, and TDA1541A datasheet is such a paper. The claim of 8x oversampling possibility (in “Features”, page 2), and 200 kHz stated limit for WS/LE (in “Characteristics”, page 6) is an example of such inconsistency.

For me, when it comes to higher sampling frequencies, a TDA1541(A) limit at BCK line appeared more important anyhow. Once I tried to send 176.4 kHz by regular I2S (11.2896 MHz BCK), and I got unbearable noise, and when I tried a 192 kHz (12.288 MHz BCK), there was no sound at all. So, my conclusion was that the TDA1541A indeed can not work with BCK frequencies above 6.4 MHz (as claimed both in “Quick reference data” and in “Characteristics”). In simultaneous data mode, this 6.4 MHz is however still enough to make it work up to 192 kHz.

Figure 4 of the same datasheet was another puzzle though, as it shows distortion graph taken with 352.8 kHz sampling frequency. It left some doubts, and it pointed out that something was missing, however at that time we practically had no recordings above 192 kHz, and it simply put me off any further research on actual TDA1541(A) bandwidth limits.

Recently, I came once again back to this problem, as one of the customers asked for the possibility of making a USB interface for TDA1541(A), that can support 384 kHz. A 384 kHz compatible USB interface might not be news anymore, but making it work with TDA1541A is still a challenge. If nothing else, I might conclude that it is not possible.

So finally, is TDA1541(A) 384 kHz compatible? The most definitive answer is yes. Its BCK pin in fact can accept up to 12.288 MHz frequencies, so in simultaneous data mode it can work up to 384 kHz. What’s fun, I found this only when I tried the old TDA1541 non -A samples of this chip – which worked right from the start. More usual TDA1541A chips again misbehaved, just like they did at 176.4 kHz in I2S. It took me some time to figure out the problem, and detect more misleading data in -A datasheet at that, and to act accordingly – but finally they did worked too.

Now, where are we at? The picture below might explain. It shows 20 kHz sine wave, at 384 kHz Fs, taken from the output of non-oversampling TDA1541A DAC (with negligible 6 dB analog low pass, which -3 dB point is at 130 kHz, so at 20 kHz it is -0.1 dB / -9 ° phase). And since this is non-o/s, there is no reason to explain that its impulse (square) response is perfect. Those familiar with these topics will know what all this means. Others may look at 20 kHz sampled at Fs 44.1 kHz, or maybe even 1 kHz sampled at the same 44.1 kHz.





Still, the next step, badly needed here, is on the music industry. Unfortunately, up to now it was not adopting any higher resolution standard in any significant way.



Related article:

High resolution audio, async USB, oversampling, upsampling and stuff: The current state of affairs

Model S4 is coming


23 Replies

  1. Avatar


    available from a guy in Canada on the DIY AUDIO Forum is a PCB that takes ‘raw’ i2S and converts it into ‘Simultaneous’ mode DATA and dos some further ‘jiggery-pokery’ (!) which allows a TDA1541 (non A and A) to work happily up to 384kHz.

    I have made such a DAC and it works superbly.


  2. Avatar

    Hello James,

    Yes, I tend to agree, what I hear is indeed promising. Hopefully more recordings will be available in foreseeable future.

    I am not sure about tricks possibly used on your board, but as opposed to TDA1541 (non -A), a TDA1541A definitely won’t work at 352.4/384 kHz, so long as you confide in Philips specifications.


  3. Avatar

    AS far i understood, the board James is talking about should work indeed in simultaneous mode at such Fs… but with & M Hz XTAL. (that’s what I have)

    I thought recently i had tested the AYA II 2014 (made with the said digital front end) to a 384 Fs material ! But it was in fact 192 K Hz instead ! I liked what i heard as well.Have still to find a 384 Fs reccording.

    But the high frequencies Xtal have also worse phase noise at low end ! And a MHz xtal can be better on the shelf if non sorted by hand checking with measurement (if I understood the trick)

    At the end of the day: resolution and details are not always musicality… highs upsampling frequencies can be good for some one bit dac chips… i mean to allow them to play like our old PCM chips we all like here : TDA 1541 the first 🙂


  4. Avatar

    Dobro, Dobro Pedja !

    Your AYA DAC is so musical and still versatile and presents a platform with very few limitations, all possibilities for the experimenter are presented and with what (20 years now?) world class and established layout (PCB). My heart and soul thank you.

    If not with already Ian Canada’s front end, I would buy your USB to PCM front-end in a heart beat!.

    My personal opinion correlates with Eldams, and also your design; go with the clock frequencies as come with your board. You can upsample to 176 or 192k, move the lowest alias frequency from 24kHz as it is with 44.1k redbook and get very close to flat to 20kHz response with no phase issues at HF.

    If I can, I would like to ask 2n2uF across the OP of 1541A, I have tried with and without (regardless of OPA861 stage or otherwise), does it present in itself some sort of LP filter with the output impedance of the 1541A itself.

    Best Regards,
    Shane Ceglar

  5. Avatar

    Meaning 2.2nF


    Attached file:

  6. Avatar

    What’s those brown stuff that you use to
    stick on top of the caps Shane ?


  7. Avatar

    Before I had VRDS Transport which had copper shim glued to the top of the caps, and also to the topside of IC’s. These were factory production units. I can only speculate as to why, but some engineer at TEAC thought it a good idea, and it got through their accounting department, so I thought.. why not?.

    In note also their copper chassis and heavy foil shielding of cables.

    Attached file:

  8. Avatar

    Was looking for multiple attachments..

    Attached file:

  9. Avatar

    And again, complements to Pedja for the bandwidth.. but really back to is 384kHz actually a burden and not a blessing.. I’m thinking 176/192 is perfect.

    Attached file:

  10. Avatar

    @ Eldam,

    I am still not sure about actual reasons behind, but my experience is just like that: lower master clock frequencies do sound (a bit) better. It might be a lower RF generation too.

    For Fs 352.4/384 kHz, a 22.5792/24.576 MHz master clock frequencies are necessary, if we want to reclock the digital lines before we send them to TDA – hence we need BCK (or bit rate) frequency x 2, and in sim. data mode BCK is Fs x 32, and hence MCK should be Fs x 64. With 45.1584/49.152 MHz it is easier to manage reclocker output timing, but there is actually no need for that.

    Hvala, Shane.

    I guess it is the first AYA, so surely more than 10 years since I designed that version.

    As reluctant about over- or up-sampling as I am, I would always rather apply it by software (PC), than by hardware. These days it should not be hard to do, and also to play a bit with different options, and that way to find own answers to (relatively) low sampling frequency problem.

    That 2n2, which I later lowered to 1n, is there to help the I/V stage input node to manage low impedance across the bandwidth, as required by TDA1541(A) output. AD844 bandwidth is several tens of MHz, and OPA861 goes above 100 MHz, but Wima FKP will be still effective above it.

    It also, as you said, acts as a low pass, but the impedance at this point is actually defined by the I/V stage. So, with AD844’s 50 Ohm a -3dB point is at 3 MHz (with 2n2 it is 1.4 MHz), with OPA861’s 8 Ohm, it is at 20 MHz (with 2n2 it is 9 MHz).

    To put all this into the real world perspective, you might consider TDA settling time, which is specified as 0.5 us (2 MHz equivalent).

    Generally speaking, the higher the bandwidth of the I/V stage, the less this cap is needed, and the lower the input impedance of I/V, the less it is effective.


  11. Avatar

    Thanks for the reply and information Pedja. Best Regards, Shane

  12. Avatar

    Thanks for the explanation Shane, while you & Eldam
    have gone to computer audio, I’ve got the other way
    cause to me don’t know what’s the deal with hi res
    audio, audition a few set ups & ???? Instead I’m
    still with Red Book but using Sd Card player.
    Sound wise, killed my 2 hi end Cdp’s.
    Btw I’ve read somewhere that addin a copper foil
    on top of TDA & ground the foil via a wire improves
    sound quality. Any comment on this guys ?


  13. Pedja Rogic

    Many years ago I was very pleased with the effects of (grounded) copper shield on top of TDA, however back then I had no practical way to make something like that in series. So I tried using aluminium heatsink instead, however the sound was worse.

    Go figure. 😉

  14. Avatar

    So it does improve sound with grounded copper shield Pedja ?

  15. Avatar

    Hi, great find, where you say:
    “Once I tried to send 176.4 kHz by regular I2S (11.2896 MHz BCK), and I got unbearable noise, and when I tried 192 kHz (12.288 MHz BCK) there was no sound at all.”
    I noticed the same but thought I was my problem (my XMOS board/wires/earthing/power supply, stupid interconnecting layout). . . and for the n-th time discarded a board. I could not get 176 from a TDA1541 where I had taken the same chip from a Philips board where the SAA7220 DID manage 176 k with ease, so my conclusion (i’m wrong) looked obvious.

    You give me inspiration to on with my quest.

  16. Avatar

    Hello Albert,

    SAA7220, if I am not mistaken, operates as 16 bit device, so its output is 32 bit I2S frame (16 bit per-channel sub-frame). In that way, TDA1541A can work up to 192 kHz, in I2S. We could make this USB interface 16 bit too, however so long as we seek TDA1541A bandwidth, in my view it is simpler to switch to simultaneous data protocol, and better jitter performance of TDA1541A comes “for free”.

    Anyhow, once I might have a look at possibilities of making TDA1541A work up to 192 kHz with 64 bit frame I2S. Its BCK input basically can accept up to 12.288 MHz frequencies, so maybe it is not impossible.


  17. Avatar


    I have created a simple FPGA-based I2S to PCM converter that would likely allow a TDA1541A to work fine at 384kHz. The bit clock is divided by 4 (64 bit frame into two 16-bit parallel frames) and therefore stays under 7MHz, even at 384kHz.

  18. Avatar

    Hi Matt,

    My problem with 16 bit frame was how to define the Latch.

    It should be positive going transition to trigger the output, and, according to the datasheet, it should go negative before the first BCK cycle goes positive (and please note that in the sim. data mode the Data is clocked into the register yet on the negative going BCK). With 16 bit frame however the negative going Latch transition inevitably falls into the binary word.

    Still, as I found out during my later experiment that made TDA work as 14 bit DAC, the timing shown in the datasheet might not be correct. Also, the minimum time between the negative going Latch and positive going BCK is claimed as 0 ns, which may mean different things.

    So, at the end of the day, it might work. Please, keep us updated.


    PS: Yes, I was thinking about 17 or 18 bit frame, but with XMOS it makes a bit of programming fuss.

  19. Avatar


    I time the latch basically as a negative edge triggered signal on the last falling edge of the 16th bit clock that is then gated by the rising edge. That way the latch enable is only high between one half cycle period of the bit clock while the bit clock is low. This is allowed by the internal delays of the latch signal giving 0 setup time and 0 time to next bit clock as specified in the datasheet. Data is transitioned on rising edges of the bit clock so it is stable for every bit clock falling edge and the rising edge of the latch enable.

  20. Avatar

    And now the $1M question:
    What does a 384kHz TDA1541A sound like.

    Is is as good as a discrete ladder DAC?


  21. Avatar

    PS I have a CD-94II with dual TDA1541A on a separate DAC board which I would like to abuse. 🙂

  22. Avatar

    A TDA1541A playing with 384 kHz source can produce the best sonic results, so far. The problem here is that we don’t have really a lot of such sources. I assume, of course, native hi-res sources, not over- or up-sampled ones.

    As for the other DACs, I would expect any other ladder DAC to benefit from higher sampling frequency. That way, it would be fair to compare different DACs only at a given fS.


  23. Avatar

    I can officially confirm now that the TDA1541A in properly configured Synchronous Data (PCM) mode can do 384kHz just fine. I have built a version of my FPGA-based converter board that uses an AK4137EQ to test the hypothesis. Before, I was only assuming as I didn’t have a source for 384KHz files.

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