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A-link (PCM / I2S direct) specifications

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Last year I've had a hard time deciding about the PCM / I2S connector I should use in the future. I was normally preferring the set of BNCs, as used in the Model S Mk3, but at the upcoming S5 there was simply no place to put all such connectors to its backplate.

The choice was narrowed down to HDMI and RJ45. The RJ45 looked like a "more clean" option to me, simply because it is just a connector, which can be used for different purposes. However, it very rarely implies the use of the shielded cable, which would be preferred here (marked STP - Shielded Twisted Pair, as opposed to the UTP - Unshielded Twisted Pair). Also, STP cables are not that widely available.

In addition, the poll we had at this site showed more of you opting for HDMI than for RJ45.

So, I settled on the HDMI connector. And HDMI cable is indeed fine for having four internal separately shielded connections, perfect for this need.

And I am obviously not the first who noticed this - some other manufacturers already used HDMI for the same purpose for some time. However the problem I saw with the existing implementations was that they almost always employ here also LVDS - Low Voltage Differential Signaling. While HDMI as a protocol in fact uses LVDS, where it indeed has its merits of lower RF emission and lower ground bounce, with no associated shortcomings because an HDMI protocol actually involves coding and decoding (and associated error correction, etc.), I consider its use inappropriate in the clean and relatively short path such as raw PCM / I2S. In fact, the use of LVDS here hugely negates the point of moving to the raw / clean PCM protocols, for two reasons.

The first is, the interface jitter sensitivity is inversely proportional to its voltage levels, because any noise that comes to the 0.1 V line is thirty times more probable to translate to the jitter than the same noise coming to the 3 V line. And the second is, all the digital audio devices natively operate with CMOS (or TTL) levels, and LVDS translators add the jitter of their own. If you look at their specs, you will find them usually having intrinsic jitter of 100 ps or more, and only the best parts come down to a couple of tens of ps.

So, in my view, there is no point in translating the PCM (I2S) signal to the LVDS level. In fact, such an approach mostly negates the benefits of moving to the clean PCM protocol for external connection.

That is why the S5 uses HDMI connectors, and native CMOS / TTL levels. Some future Audial devices will use the same solution.

The other manufacturers are welcome to adopt the same specifications. The following document provides the details.

Questions and comments are welcome.

27 Nov 2021 update: Draft specifications for this connection got superseded by the regular version, now called A-link.

It also adds several features, including the multichannel operation.

A-link specifications


Back in the days and with no technical knowledge, I played with I2S protocol in Philips CD players removing the serie resistors at the output of the I2S line on the laser pickup pcbs and the same at the inputt of the dac chip I2S line. I experienced more details while not asking myself about judging the music as a whole : better balance and tonal, fatigue, etc ...

Now I know that resistors between the long traces of the I2S protocol were here for anti bouncing signal purpose. Also few years ago, some experienced the way to reduce the jitter in the incoming I2S ports off the TDA1541A by reducing at max the voltage level (or was it curent?) of the ports 1 to 3. If I remember correctly, with a serie RC filter or even reverseded signal diode that pass its minimal voltage in one direction only. It was given up by his author, Lrck and Bck being too much sensible. Maybe the jitter reduction purpose was not so great with the Spidf chip often seen ? I don't know.

Now what about these anti-bouncing resistors on the I2S lines we always see in the little Xmos/Cmos signal to I2S boards in the DIY world and the ones at the arrival -as they work by pair on an I2S line- ?

How those resistors contribute with noise or/and jitter with the often seen 3V I2S signal ?

Is there not a safe short distance (2"? 4" ? , ...?) between the emitter and the receiver to get rid of these serie resistors in the I2S line.

Anyway, sorry for the technical vocabulary and descriptions  that might not be accurate but always had the feeling is the less was the best here ?! Which is to rephrase it : when does it bounce or not ? I believe also to know that inside the TDA1541A I2S inputs are protected by a diode ?

At least quality of resistors must be important there ? wirewound with the lowest temp ppm coef drift (Ayrton Perry type, i.e. double winding)? When smd casing : good enough thin film made by Sussumu or Vishay ?



Hello Eldam,

This hugely depends on what you are starting with. Those old Philips CD players were terrible with regard to the signal integrity. A lot of noise, ugly waveforms, not to mention the jitter, and in such an environment numerous tweaks of this kind were worthwhile.

Things however have notably changed, for the better, and later, when I tried different signal conditioning tweaks with CS8412 and TDA1541A, I did not get any real results.

Speaking about today's S/PDIF receivers, the CS8416 output signal looks almost as good as you may want. Also, some modern logic series output waveforms are very hard to argue against. They have both fast edges and no or barely visible overshoot.

If you are worried about it, one small series resistor usually makes it look like from the book. If you assume 10 pF is always there (be it the next chip input capacitance + stray capacitance, or the input capacitance of the typical scope probe you put there to see it), something like 47 Ohm is usually enough to make any overshoot disappear.

Very recently however I found it sometimes beneficial to slow these edges a bit more, by using more capacitance after these series resistors, so that some small HF noise gets shunted to the ground in a controlled way, instead of by the input capacitance of the receiving chip, to its own substrate. I am not talking about anything radical, but about slowing the edges down to something like 10 nanoseconds or so. (Please note that this rise/fall time is simply the product of this resistance and capacitance.) This may work well and bring both sonic improvements and measurable lower jitter at the output.

I am telling this because the shunt capacitance of the cable used for this PCM / I2S line, which comes after the (specified) 100 Ohm series resistor, may come in handy for exactly the same purpose.

Can these resistors at PCM/ I2S line be unwanted for some reason? If you start with fast edges, and use reasonably small values, and reasonably short lengths (good layout is understood), I am not aware of any.

As for the parts themselves, I am afraid there is again no general answer. Sometimes, the parts at digital lines show the same sonic properties as if they were used at the audio path, sometimes they are irrelevant.


Thanks Pedja.

I wonder for a while indeed if those resistors could have a signature at a so low energy level, or if even soldering traces could be a problem due to the speed. I assume it's not RF, so not so hard and many devices have more speed and datas transmitted without loss : computers, sonars, etc ! Maybe because noise, sonar is a better analogy. It's not intuitive how jitter and noise can contribute or not to the perceived sounding quality as there are much to worry after the dac chip (I/V stage). Anyway, low phase noise clock that are stable (3 days for stabilize a switched on DAC device because the crystals is something we often read those days) are said to contribute to a better sound.

Maybe one day I will experiment just for the curiosity if in serie on the I2S a good wireround Ayrton Perry winding type can make a difference with a smd thin film like Sussumu or at least a good through hole metal type à la Yageo. We are not in the analogic domain, I don't know how much temp co factor and noise matter with so low current and voltage. Well I am not an electric engineer so my questions can be alas irrelevant !

It is two years since I published the A-link specs, and by now, plenty of Audial DACs with this interface have been shipped.

Some customers asked if these units may be compatible with other manufacturers' I2S sources, using HDMI connectors but nominally not complying with A-link.

The A-link pinout is indeed similar to the other I2S standards using an HDMI connector. The most important, when you look at it, are DATA (a.k.a. SD), BCK (a.k.a. SCK), and WS (a.k.a. LRCK), and they are at pins 1, 4, and 7, respectively. If your I2S source uses such a pinout, it is possible that it may work with A-link too. Please note, if your source pin 1 is Data (SD) negative, the signal polarity will be inverted (with very negligible DC offset as well), and if pin 7 is WS (LRCK) negative, the channels will be reversed (and there will be a delay between channels equal to 1/Fs, which will be also negligible, but only so long as you don't listen with headphones), but in terms of the fundamental operation, it will still work.

What still matters is the voltage.

By proposing the A-link, my main goal was quality. For this reason, I proposed a connection that uses "native" (CMOS/TTL) voltages. Practically speaking, the CMOS/TTL nowadays means mostly the signal swinging up to 3.3 or 5 Volts (triggering around half of this voltage for CMOS or around 1.3 V for TTL).

If your source uses LVDS, it is important to understand that the LVDS swing can be anything above 100 mV and is typically between 200 mV and 400 mV (differentially, loaded), although it can be also higher. Its typical offset voltage is 1.2 V, so what you may expect as a typical LVDS source is a signal swinging between 1 V and 1.4 V. LVDS, of course, also implies the negative poles, but the A-link DACs will simply ignore them.

Audial A-link specifies 2.3 V as a minimum for the high state. Audial DACs may work with a bit lower voltages, but such an operation is not guaranteed. So, if your source is nominally LVDS, you should contact the manufacturer and ask for information on the actual output voltage swing of their sources.

Unfortunately, I am not in a position to acquire different I2S sources to check if they will work with A-link or not, sorry. However, according to the feedback I had from the customers, I can report that the following units worked well with Audial S5 DAC A-link input.

XingCore AF200 USB Bridge ("Reverse the Phase" should not be checked) - credit to Bernd

Pi2AES 2.0 (W1 jumper 5-6 out) - credit to John

Everyone else who successfully tried Audial DACs with other manufacturers' sources with such an interface is welcome to report here.

Hello Pedja,

I can confirm that the Pink Faun I2S bridge with "Audial S5"-daughterboard works (and sounds) great.

Best regards,



Thanks, Friso.

Can you only please clarify, does "Audial S5" mean some setting within the Pink Faun I2S bridge interface, or...? I have no experience with it personally, but as far as I know, it is made (or can be made) to fit different DACs / interfaces.

And, talking about the Pink Faun I2S bridge, it was earlier confirmed to work with Audial Model S Mk3, with appropriate HDMI -> 3 x BNC cable.

Yes, depending on the DAC they place a different board on top of the I2S PCI bridge. Look at their web page, you can select for different DACs.
Audial is only in the list with the 3 x BNC connection (according to Pink Faun this is for older models), but they also have a HDMI board for the Audial S5, but you have to mail them.


I heard from one Audial S5 user that Cocktail Audio X50D I2S works fine. Cocktail Audio HDMI is in "PS Audio" standard like mentioned Pi2AES 2.0 configuration. So in theory of I2S is a properly implemented PS Audio it should work with S5?


According to what Paul McGowan published years ago, PS Audio uses the DATA (SD) negative at pin 1, and the WS (LRCK) negative at pin 7, so my notice from post #5 above would apply.

Also, although some combinations may work even if they are presumably not voltage compatible, for guaranteed operation the S5 will require a higher voltage than what the real LVDS usually provides.


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